NXP Semiconductors PXN2020 - Page 1142

IEEE 1149.1 Test Access Port Controller (JTAGC)
PXN20 Microcontroller Reference Manual, Rev. 1
35-8 Freescale Semiconductor
Figure 35-6. IEEE 1149.1-2001 TAP Controller Finite State Machine
TEST LOGIC
RESET
RUN-TEST/IDLE
SELECT-DR-SCAN
SELECT-IR-SCAN
CAPTURE-DR
CAPTURE-IR
SHIFT-DR
SHIFT-IR
EXIT1-DR
EXIT1-IR
PAUSE-DR
PAUSE-IR
EXIT2-DR
EXIT2-IR
UPDATE-DR
UPDATE-IR
1
0
1
1
1
00
0
0
1
1
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
0
NOTE: The value shown adjacent to each state transition in this figure represents the value of TMS at the time
of a rising edge of TCK.