Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 36-17
MCKO_DIV MCKO Division Factor. The value of this signal determines the frequency of MCKO relative to the system
clock frequency when MCKO_EN is asserted. In this table, SYS_CLK represents the system clock
frequency.
EVT_EN EVTO
/EVTI Enable. This bit enables the EVTO/EVTI port functions.
0 EVTO/EVTI port disabled.
1 EVTO
/EVTI port enabled.
LP_DBG_EN Low Power Debug Enable. The LP_DBG_EN bit enables debug functionality to support entry and exit from
low power sleep mode.
0 Low power debug disabled.
1 Low power debug enabled.
SLEEP_SYNC Sleep Mode Synchronization. The SLEEP_SYNC bit is used to synchronize the entry into / exit from sleep
mode between the device and debug tool. Before entry into sleep mode, the device sets this bit. After
reading SLEEP_SYNC as set, the debug tool then clears SLEEP_SYNC to acknowledge to the device that
it may enter into sleep mode. During wakeup from sleep mode, the debug tool sets SLEEP_SYNC to
acknowledge to the device that it may exit sleep mode.
0 No sleep mode entry pending.
1 Sleep mode entry pending.
Note: During sleep entry, the device sets the SLEEP_SYNC bit. The debug tool then clears this bit to enter
low power mode. The bit changes to 0, but is not readable, since the device immediately enters low
power mode. During sleep exit, the device then clears the SLEEP_SYNC bit. Then the debug tool sets
this bit to exit low power mode. The bit does not change to 1.
PSTAT_EN Processor status mode enable. Enables processor status (PSTAT) mode. In PSTAT mode, all auxiliary
output port MDO pins are used to transmit processor status information, and Nexus messaging is
unavailable.
0 PSTAT mode disabled.
1 PSTAT mode enabled.
Note: PSTAT mode is intended for factory processor debug only. Customers should clear the PSTAT_EN bit
should be cleared to disable PSTAT mode. When PSTAT mode is enabled, no Nexus messages are
transmitted under any circumstances.
Table 36-9. PCR Field Descriptions (continued)
Field Description
MCKO_DIV MCKO Frequency
0b000
1
SYS_CLK
0b001 SYS_CLK 2
0b010 Reserved
0b011 SYS_CLK
4
0b100 Reserved
0b101 Reserved
0b110 Reserved
0b111 SYS_CLK
8
1
The SYS_CLK setting for MCKO frequency should only be
used if this setting does not violate the maximum operating
frequency of the auxiliary port pins.
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