Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
36-66 Freescale Semiconductor
NOTE
The data values must be shifted out 32-bits at a time LSB first (that is,
double-word read = two word reads from the RWD).
NOTE
The actual RWA value as well as the CNT field within the RWCS are not
changed when executing a block read access (burst or non-burst). The
original values can be read by the external development tool at any time.
36.6.10.6.7 Error Handling
The Nexus3+ module handles various error conditions as follows:
System Bus Read/Write Error
All address and data errors that occur on read/write accesses to the e200z6 system bus returns a transfer
error. If this occurs:
1. The access is terminated without re-trying (AC bit is cleared).
2. The ERR bit in the RWCS register is set.
3. The error message is sent (TCODE = 8) indicating read/write error.
Access Termination
The following cases are defined for sequences of the read/write protocol that differ from those described
in the above sections:
1. If the AC bit in the RWCS register is set to start read/write accesses and invalid values are loaded
into the RWD and/or RWA, then a system bus access error may occur. This is handled as described
above.
2. If a block access is in progress (all cycles not completed), and the RWCS register is written, then
the original block access is terminated at the boundary of the nearest completed access.
a) If the RWCS is written with the AC bit set, the next read/write access begins and the RWD can
be written to/ read from.
b) If the RWCS is written with the AC bit cleared, the read/write access is terminated at the nearest
completed access. This method can be used to break (early terminate) block accesses.
36.6.10.6.8 Read/Write Access Error Message
The read/write access error message is sent out when an system bus access error (read or write) has
occurred.
Error information is messaged out in the following format:
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