NXP Semiconductors PXN2020 - Page 1261

Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor A-3
Table A-2. PXN20 System Memory Map
Address
Size
{KB}
Region Name Comments
Unimple-
mented on
PXN21
Unimple-
mented on
PXN20Start End
Flash (AXBS Port S0 and S1)
0x0000_0000 0x0000_3FFF 16 Program/Data Flash or Test
Row
Test Row is
accessible if the
TST0[TRE] bit in the
Flash configuration
block is set
0x0000_4000 0x0000_7FFF 16 Program/Data Flash
0x0000_8000 0x0000_BFFF 16 Program/Data Flash
0x0000_C000 0x0000_FFFF 16 Program/Data Flash
0x0001_0000 0x0001_3FFF 16 Program/Data Flash
0x0001_4000 0x0001_7FFF 16 Program/Data Flash
0x0001_8000 0x0001_BFFF 16 Program/Data Flash
0x0001_C000 0x0001_FFFF 16 Program/Data Flash
0x0002_0000 0x0002_FFFF 64 Program/Data Flash
0x0003_0000 0x0003_FFFF 64 Program/Data Flash
0x0004_0000 0x0005_FFFF 128 Program/Data Flash
0x0006_0000 0x0007_FFFF 128 Program/Data Flash
0x0008_0000 0x000B_FFFF 256 Program/Data Flash
0x000C_0000 0x000F_FFFF 256 Program/Data Flash
0x0010_0000 0x0013_FFFF 256 Program/Data Flash
0x0014_0000 0x0017_FFFF 256 Program/Data Flash
0x0018_0000 0x001B_FFFF 256 Program/Data Flash
0x001C_0000 0x001F_FFFF 256 Program/Data Flash
0x0020_0000 0x00FF_BFFF 14,320 Reserved
0x00FF_C000 0x00FF_FFFF 16 Shadow Row
0x0100_0000 0x1FFF_FFFF 507,904 Flash Emulation Mapping
0x2000_0000 0x3FFF_FFFF 524,288 Reserved
SRAM (AXBS Ports S2 and S3)
0x4000_0000 0x4007_FFFF 512 SRAM (AXBS Port S2) This 1Mbyte address
space is mirrored
512 times in the
address range
0x4000_0000 to
0x5FFF_FFFF
> 128 KB
0x4008_0000 0x4009_3FFF 80 SRAM (AXBS Port S3) X
0x4009_4000 0x400F_FFFF 432 Reserved