NXP Semiconductors PXN2020 - Page 1296

Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
A-38 Freescale Semiconductor
0x04C0
MBCCSR120–Message buffer configuration, control, status
register 120
R/W 0x0000 26.5.2.68/26-73
0x04C2 MBCCFR120–Message buffer cycle counter filter register 120 R/W —
3
26.5.2.69/26-75
0x04C4 MBFIDR120–Message buffer frame ID register 120 R/W 0x0UUU 26.5.2.70/26-76
0x04C6 MBIDXR120–Message buffer index register 120 R/W 0x00UU 26.5.2.71/26-76
0x04C8 MBCCSR121–Message buffer configuration, control, status
register 121
R/W 0x0000 26.5.2.68/26-73
0x04CA
MBCCFR121–Message buffer cycle counter filter register 121 R/W —
3
26.5.2.69/26-75
0x04CC MBFIDR121–Message buffer frame ID register 121 R/W 0x0UUU 26.5.2.70/26-76
0x04CE MBIDXR121–Message buffer index register 121 R/W 0x00UU 26.5.2.71/26-76
0x04D0 MBCCSR122–Message buffer configuration, control, status
register 122
R/W 0x0000 26.5.2.68/26-73
0x04D2 MBCCFR122–Message buffer cycle counter filter register 122 R/W —
3
26.5.2.69/26-75
0x04D4 MBFIDR122–Message buffer frame ID register122 R/W 0x0UUU 26.5.2.70/26-76
0x04D6 MBIDXR122–Message buffer index register 122 R/W 0x00UU 26.5.2.71/26-76
0x04D8 MBCCSR123–Message buffer configuration, control, status
register 123
R/W 0x0000 26.5.2.68/26-73
0x04DA MBCCFR123–Message buffer cycle counter filter register 123 R/W —
3
26.5.2.69/26-75
0x04DC MBFIDR123–Message buffer frame ID register 123 R/W 0x0UUU 26.5.2.70/26-76
0x04DE MBIDXR123–Message buffer index register 123 R/W 0x00UU 26.5.2.71/26-76
0x04E0 MBCCSR124–Message buffer configuration, control, status
register 124
R/W 0x0000 26.5.2.68/26-73
0x04E2
MBCCFR124–Message buffer cycle counter filter register 124 R/W —
3
26.5.2.69/26-75
0x04E4
MBFIDR124–Message buffer frame ID register 124 R/W 0x0UUU 26.5.2.70/26-76
0x04E6 MBIDXR124–Message buffer index register 124 R/W 0x00UU 26.5.2.71/26-76
0x04E8 MBCCSR125–Message buffer configuration, control, status
register 125
R/W 0x0000 26.5.2.68/26-73
0x04EA MBCCFR125–Message buffer cycle counter filter register 125 R/W —
3
26.5.2.69/26-75
0x04EC MBFIDR125–Message buffer frame ID register 125 R/W 0x0UUU 26.5.2.70/26-76
0x04EE MBIDXR125–Message buffer index register 125 R/W 0x00UU 26.5.2.71/26-76
0x04F0 MBCCSR126–Message buffer configuration, control, status
register 126
R/W 0x0000 26.5.2.68/26-73
0x04F2
MBCCFR26–Message buffer cycle counter filter register 126 R/W —
3
26.5.2.69/26-75
0x04F4 MBFIDR126–Message buffer frame ID register 126 R/W 0x0UUU 26.5.2.70/26-76
0x04F6 MBIDXR126–Message buffer index register 126 R/W 0x00UU 26.5.2.71/26-76
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page