NXP Semiconductors PXN2020 - Page 1302

Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
A-44 Freescale Semiconductor
0x0028–0x0042 Reserved
0x0043 ECR—ECC Configuration R/W 0x00 19.2.2.2/19-5
0x0047 ESR—ECC status R/W 0x00 19.2.2.3/19-6
0x004A EEGR—ECC error generation R/W 0x0000 19.2.2.4/19-7
0x0050 PFEAR—PFlash ECC address R —
3
19.2.2.5/19-9
0x0056 PFEMR—PFlash ECC master R 0x0U 19.2.2.6/19-10
0x0057 PFEAT—PFlash ECC attributes register R —
3
19.2.2.7/19-10
0x0058 PFEDRH—PFlash ECC data register high R —
3
19.2.2.8/19-11
0x005C PFEDRL—PFlash ECC data register low R —
3
19.2.2.8/19-11
0x0060 PREAR—PRAM ECC address R —
3
19.2.2.9/19-12
0x0065 PRESR—PRAM ECC syndrome register R —
3
19.2.2.10/19-13
0x0066 PREMR—PRAM ECC master R 0x0U 19.2.2.11/19-14
0x0067 PREAT—PRAM ECC attributes R —
3
19.2.2.12/19-15
0x0068 PREDRH—PRAM ECC data register high R —
3
19.2.2.13/19-16
0x006C PREDRL—PRAM ECC data register low R —
3
19.2.2.13/19-16
0x0070–0x3FFF Reserved
0xFFF4_4000
eDMA
Chapter 24, Enhanced Direct Memory Access Controller (eDMA)
0x0000 EDMA_CR—eDMA control register R/W 0x0000_0400 24.3.2.1/24-8
0x0004 EDMA_ESR—eDMA error status register R 0x0000_0000 24.3.2.2/24-10
0x0008 Reserved
0x000C EDMA_ERQRL—eDMA enable request low register
(channels 31–00)
R/W 0x0000_0000 24.3.2.3/24-12
0x0010 Reserved
0x0014 EDMA_EEIRL—eDMA enable error interrupt low register
(channels 31–00)
R/W 0x0000_0000 24.3.2.4/24-13
0x0018 EDMA_SERQR—eDMA set enable request register W 0x00 24.3.2.5/24-14
0x0019 EDMA_CERQR—eDMA clear enable request register W 0x00 24.3.2.6/24-15
0x001A EDMA_SEEIR—eDMA set enable error interrupt register W 0x00 24.3.2.7/24-15
0x001B EDMA_CEEIR—eDMA clear enable error interrupt register W 0x00 24.3.2.8/24-16
0x001C EDMA_CIRQR—eDMA clear interrupt request register W 0x00 24.3.2.9/24-17
0x001D EDMA_CER—eDMA clear error register W 0x00 24.3.2.10/24-18
0x001E EDMA_SSBR—eDMA set start bit register W 0x00 24.3.2.11/24-18
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page