Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
A-46 Freescale Semiconductor
0x0117 EDMA_CPR23—eDMA channel 23 priority register R/W 0x17 24.3.2.16/24-22
0x0118 EDMA_CPR24—eDMA channel 24 priority register R/W 0x18 24.3.2.16/24-22
0x0119 EDMA_CPR25—eDMA channel 25 priority register R/W 0x19 24.3.2.16/24-22
0x011A EDMA_CPR26—eDMA channel 26 priority register R/W 0x1A 24.3.2.16/24-22
0x011B EDMA_CPR27—eDMA channel 27 priority register R/W 0x1B 24.3.2.16/24-22
0x011C EDMA_CPR28—eDMA channel 28 priority register R/W 0x1C 24.3.2.16/24-22
0x011D EDMA_CPR29—eDMA channel 29 priority register R/W 0x1D 24.3.2.16/24-22
0x011E EDMA_CPR30—eDMA channel 30 priority register R/W 0x1E 24.3.2.16/24-22
0x011F EDMA_CPR31—eDMA channel 31 priority register R/W 0x1F 24.3.2.16/24-22
0x0120–0x0FFF Reserved
0x1000 TCD00—eDMA transfer control descriptor 00 R/W —
1
0x1020 TCD01—eDMA transfer control descriptor 01 R/W —
1
24.3.2.17/24-23
0x1040 TCD02—eDMA transfer control descriptor 02 R/W —
1
24.3.2.17/24-23
0x1060 TCD03—eDMA transfer control descriptor 03 R/W —
1
24.3.2.17/24-23
0x1080 TCD04—eDMA transfer control descriptor 04 R/W —
1
24.3.2.17/24-23
0x10A0 TCD05—eDMA transfer control descriptor 05 R/W —
1
24.3.2.17/24-23
0x10C0 TCD06—eDMA transfer control descriptor 06 R/W —
1
24.3.2.17/24-23
0x10E0 TCD07—eDMA transfer control descriptor 07 R/W —
1
24.3.2.17/24-23
0x1100 TCD08—eDMA transfer control descriptor 08 R/W —
1
24.3.2.17/24-23
0x1120 TCD09—eDMA transfer control descriptor 09 R/W —
1
24.3.2.17/24-23
0x1140 TCD10—eDMA transfer control descriptor 10 R/W —
1
24.3.2.17/24-23
0x1160 TCD11—eDMA transfer control descriptor 11 R/W —
1
24.3.2.17/24-23
0x1180 TCD12—eDMA transfer control descriptor 12 R/W —
1
24.3.2.17/24-23
0x11A0 TCD13—eDMA transfer control descriptor 13 R/W —
1
24.3.2.17/24-23
0x11C0 TCD14—eDMA transfer control descriptor 14 R/W —
1
24.3.2.17/24-23
0x11E0 TCD15—eDMA transfer control descriptor 15 R/W —
1
24.3.2.17/24-23
0x1200 TCD16—eDMA transfer control descriptor 16 R/W —
1
24.3.2.17/24-23
0x1220 TCD17—eDMA transfer control descriptor 17 R/W —
1
24.3.2.17/24-23
0x1240 TCD18—eDMA transfer control descriptor 18 R/W —
1
24.3.2.17/24-23
0x1260 TCD19—eDMA transfer control descriptor 19 R/W —
1
24.3.2.17/24-23
0x1280 TCD20—eDMA transfer control descriptor 20 R/W —
1
24.3.2.17/24-23
0x12A0 TCD21—eDMA transfer control descriptor 21 R/W —
1
24.3.2.17/24-23
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page