Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor A-51
0x00C8–0x00E3 Reserved
0x00E4 PALR—MAC address low register R/W —
3
25.3.4.12/25-21
0x00E8 PAUR—MAC address upper register + type field R/W
0xUUUU_8808
25.3.4.13/25-21
0x00EC OPD—Opcode + pause duration fields R/W
0x0001_UUUU
25.3.4.14/25-22
0x00F0–0x0117 Reserved
0x0118 IAUR—Upper 32 bits of individual hash table R/W —
3
25.3.4.15/25-23
0x011C IALR—Lower 32 bits of individual hash table R/W —
3
25.3.4.16/25-23
0x0120 GAUR—Upper 32 bits of group hash table R/W —
3
25.3.4.17/25-24
0x0124 GALR—Lower 32 bits of group hash table R/W —
3
25.3.4.18/25-25
0x0128–0x0143 Reserved
0x0144 TFWR—Transmit FIFO watermark R/W 0x0000_0000 25.3.4.19/25-25
0x0148–0x014B Reserved
0x014C FRBR—FIFO receive bound register R/W 0x0000_0500 25.3.4.20/25-26
0x0150 FRSR—FIFO receive FIFO start registers R/W 0x0000_0500 25.3.4.21/25-27
0x0154–0x017F Reserved
0x0180 ERDSR—Pointer to receive descriptor ring R/W —
3
25.3.4.22/25-27
0x0184 ETDSR—Transmit buffer descriptor ring start register R/W —
3
25.3.4.23/25-28
0x0188 EMRBR—Receive buffer size register R/W —
3
25.3.4.24/25-29
0x018C–0x3FFF Reserved
0xFFF5_0000–
0xFFF7_FFFF
Reserved
0xFFF8_0000
ADC_A
Chapter 34, Analog-to-Digital Converter (ADC)
0x0000 MCR — Main configuration register R/W
4
0x0000_0001 34.3.2.1/34-8
0x0004 MSR — Main status register R/W
1
0x0000_0001 34.3.2.2/34-10
0x0008–0x000C Reserved
0x0010 ISR — Interrupt status register R/W
1
0x0000_0000 34.3.2.3/34-12
0x0014 CEOCFR0 — Channel pending register 0 R/W
1
0x0000_0000 34.3.2.4/34-13
0x0018 CEOCFR1 — Channel pending register 1 R/W
1
0x0000_0000 34.3.2.5/34-13
0x001C CEOCFR2 — Channel pending register 2 R/W
1
0x0000_0000 34.3.2.6/34-14
0x0020 IMR — Interrupt mask register R/W
1
0x0000_0000 34.3.2.7/34-15
0x0024 CIMR0 — Channel Interrupt mask register 0 R/W
1
0x0000_0000 34.3.2.8/34-15
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page
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