Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
A-58 Freescale Semiconductor
0x0018
DSPI_CTAR3
—
DSPI clock and transfer attributes register 3
R/W 0x7800_0000
30.3.2.3/30-10
0x001C
DSPI_CTAR4
—
DSPI clock and transfer attributes register 4
R/W 0x7800_0000
30.3.2.3/30-10
0x0020
DSPI_CTAR5
—
DSPI clock and transfer attributes register 5
R/W 0x7800_0000
30.3.2.3/30-10
0x0024
DSPI_CTAR6
—
DSPI clock and transfer attributes register 6
R/W 0x7800_0000
30.3.2.3/30-10
0x0028
DSPI_CTAR7
—
DSPI clock and transfer attributes register 7
R/W 0x7800_0000
30.3.2.3/30-10
0x002C DSPI_SR—DSPI status register R 0x0200_0000
30.3.2.4/30-16
0x0030 DSPI_RSER—DSPI DMA/interrupt request select and
enable register
R/W 0x0000_0000
30.3.2.5/30-18
FIFO Registers
0x0034 DSPI_PUSHR—DSPI push TX FIFO register R/W 0x0000_0000
30.3.2.6/30-19
0x0038 DSPI_POPR—DSPI pop RX FIFO register R 0x0000_0000
30.3.2.7/30-21
0x003C DSPI_TXFR0—DSPI transmit FIFO register 0 R 0x0000_0000
30.3.2.8/30-21
0x0040 DSPI_TXFR1—DSPI transmit FIFO register 1 R 0x0000_0000
30.3.2.8/30-21
0x0044 DSPI_TXFR2—DSPI transmit FIFO register 2 R 0x0000_0000
30.3.2.8/30-21
0x0048 DSPI_TXFR3—DSPI transmit FIFO register 3 R 0x0000_0000
30.3.2.8/30-21
0x004C–0x0078 Reserved
0x007C DSPI_RXFR0—DSPI receive FIFO register 0 R 0x0000_0000
30.3.2.9/30-22
0x0080 DSPI_RXFR1—DSPI receive FIFO register 1 R 0x0000_0000
30.3.2.9/30-22
0x0084 DSPI_RXFR2—DSPI receive FIFO register 2 R 0x0000_0000
30.3.2.9/30-22
0x0088 DSPI_RXFR3—DSPI receive FIFO register 3 R 0x0000_0000
30.3.2.9/30-22
0x008C–0x00B8 Reserved
0xFFF9_8000 –
0xFFF9_FFFF
Reserved
0xFFFA_0000
eSCI_A
Chapter 31, Enhanced Serial Communication Interface (eSCI)
0x0000 eSCI_BRR—eSCI baud rate register R/W 0x0004 31.3.2.1/31-6
0x0002 eSCI_CR1—eSCI control register 1 R/W 0x0000 31.3.2.2/31-6
0x0004 eSCI_CR2—eSCI control register 2 R/W 0x0200 31.3.2.3/31-8
0x0006 eSCI_SDR—eSCI data register R/W 0x0000 31.3.2.4/31-10
0x0008 eSCI_IFSR1—eSCI interrupt flag and status register 1 R/W 0x0000 31.3.2.5/31-11
0x000A eSCI_IFSR2—eSCI interrupt flag and status register 2 R/W 0x0000 31.3.2.6/31-12
0x000C eSCI_LCR1—eSCI LIN control register 1 R/W 0x0000 31.3.2.7/31-13
0x000E eSCI_LCR2—eSCI LIN control register 2 R/W 0x0000 31.3.2.8/31-15
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page
To Next Page
Loading...
