NXP Semiconductors PXN2020 - Page 1359

Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor A-101
0x03C0 EMIOS_CADR[29]—Channel A data register R/W 0x0000_0000 28.3.2.5/28-12
0x03C4 EMIOS_CBDR[29]—Channel B data register R/W 0x0000_0000 28.3.2.6/28-12
0x03C8 EMIOS_CCNTR[29]—Counter register R 0x0000_0000 28.3.2.7/28-13
0x03CC EMIOS_CCR[29]—Control register R/W 0x0000_0000 28.3.2.8/28-14
0x03D0 EMIOS_CSR[29]—Status register R 0x0000_0000 28.3.2.9/28-19
0x03D4 EMIOS_ALTA[29]—Alternate A register R/W 0x0000_0000 28.3.2.10/28-19
0x03D8–0x03DF Reserved
0x03E0 EMIOS_CADR[30]—Channel A data register R/W 0x0000_0000 28.3.2.5/28-12
0x03E4 EMIOS_CBDR[30]—Channel B data register R/W 0x0000_0000 28.3.2.6/28-12
0x03E8 EMIOS_CCNTR[30]—Counter register R 0x0000_0000 28.3.2.7/28-13
0x03EC EMIOS_CCR[30]—Control register R/W 0x0000_0000 28.3.2.8/28-14
0x03F0 EMIOS_CSR[30]—Status register R 0x0000_0000 28.3.2.9/28-19
0x03F4 EMIOS_ALTA[30]—Alternate A register R/W 0x0000_0000 28.3.2.10/28-19
0x03F8–0x03FF Reserved
0x0400 EMIOS_CADR[31]—Channel A data register R/W 0x0000_0000 28.3.2.5/28-12
0x0404 EMIOS_CBDR[31]—Channel B data register R/W 0x0000_0000 28.3.2.6/28-12
0x0408 EMIOS_CCNTR[31]—Counter register R 0x0000_0000 28.3.2.7/28-13
0x040C EMIOS_CCR[31]—Control register R/W 0x0000_0000 28.3.2.8/28-14
0x0410 EMIOS_CSR[31]—Status register R 0x0000_0000 28.3.2.9/28-19
0x0414 EMIOS_ALTA[31]—Alternate A register R/W 0x0000_0000 28.3.2.10/28-19
0x0418–0x3FFF Reserved
0xFFFE_8000
SIU
Chapter 8, System Integration Unit (SIU)
0x0000–0x0003 Reserved
0x0004 SIU_MIDR—MCU ID register R —
5
8.3.2.1/8-13
0x0008–0x000B Reserved
0x000C SIU_RSR—Reset status register R/W 0x8000_000U 8.3.2.2/8-14
0x0010 SIU_SRCR—System reset control register R/W 0x0800_C000 8.3.2.3/8-15
0x0014 SIU_EISR—SIU External Interrupt Status Register R/W 0x0000_0000 8.3.2.4/8-16
0x0018 SIU_DIRER—DMA/interrupt request enable register R/W 0x0000_0000 8.3.2.5/8-17
0x001C SIU_DIRSR—DMA/interrupt request select register R/W 0x0000_0000 8.3.2.6/8-18
0x0020 SIU_OSR—Overrun status register R/W 0x0000_0000 8.3.2.7/8-19
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page