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NXP Semiconductors PXN2020 - Page 212

NXP Semiconductors PXN2020
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System Integration Unit (SIU)
PXN20 Microcontroller Reference Manual, Rev. 1
8-30 Freescale Semiconductor
Offset: SIU_BASE + 0x0904 Access: User read/write
0123456789101112131415
R
ESEL15 ESEL14 ESEL13 ESEL12 ESEL11 ESEL10 ESEL9 ESEL8
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
ESEL7 ESEL6 ESEL5 ESEL4 ESEL3 ESEL2 ESEL1 ESEL0
W
Reset0000000000000000
Figure 8-19. IMUX Select Register 1 (SIU_ISEL1)
Table 8-21. SIU_ISEL1 Field Descriptions
Field Description
1
ESEL15 External IRQ Input Select 15. Specifies input for IRQ15.
00 PB15 pin.
01 PC15 pin.
10 PD15 pin.
11 ISEL2.
ESEL14 External IRQ Input Select 14. Specifies input for IRQ14.
00 PB14 pin.
01 PC14 pin.
10 PD14 pin.
11 ISEL2.
ESEL13 External IRQ Input Select 13. Specifies input for IRQ13.
00 PB13 pin.
01 PC13 pin.
10 PD13 pin.
11 ISEL2.
ESEL12 External IRQ Input Select 12. Specifies input for IRQ12.
00 PB12 pin.
01 PC12 pin.
10 PD12 pin.
11 ISEL2.
ESEL11 External IRQ Input Select 11. Specifies input for IRQ11.
00 PB11 pin.
01 PC11 pin.
10 PD11 pin.
11 ISEL2.
ESEL10 External IRQ Input Select 10. Specifies input for IRQ10.
00 PB10 pin.
01 PC10 pin.
10 PD10 pin.
11 ISEL2.

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