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NXP Semiconductors PXN2020 - Page 566

NXP Semiconductors PXN2020
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Enhanced Direct Memory Access Controller (eDMA)
PXN20 Microcontroller Reference Manual, Rev. 1
24-46 Freescale Semiconductor
The following coherency model is recommended when executing a dynamic channel link or dynamic
scatter-gather request:
1. Set the TCD.MAJOR.E_LINK bit.
2. Read back the TCD.MAJOR.E_LINK bit
3. Test the TCD.MAJOR.E_LINK request status:
a) If the bit is set, the dynamic link attempt was successful.
b) If the bit is cleared, the attempted dynamic link did not succeed, the channel was already
retiring.
This same coherency model is true for dynamic scatter-gather operations. For both dynamic requests, the
TCD local memory controller forces the TCD.MAJOR.E_LINK and TCD.E_SG bits to zero on any writes
to a channel’s TCD after that channel’s TCD.DONE bit is set indicating the major loop is complete.
NOTE
The user must clear the TCD.DONE bit before writing the
TCD.MAJOR.E_LINK or TCD.E_SG bits. The TCD.DONE bit is cleared
automatically by the eDMA engine after a channel begins execution.

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