NXP Semiconductors PXN2020 - Page 686

FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
26-72 Freescale Semiconductor
26.5.2.67.25 Protocol Configuration Register 24 (PCR24)
26.5.2.67.26 Protocol Configuration Register 25 (PCR25)
26.5.2.67.27 Protocol Configuration Register 26 (PCR26)
26.5.2.67.28 Protocol Configuration Register 27 (PCR27)
26.5.2.67.29 Protocol Configuration Register 28 (PCR28)
Base + 0x00D0 Write: POC:config
0123456789101112131415
R
cluster_drift_damping max_payload_length_dynamic
micro_per_cycle_min
[19:16]
W
Reset0000000000000000
Figure 26-92. Protocol Configuration Register 24 (PCR24)
Base + 0x00D2 Write: POC:config
0123456789101112131415
R
micro_per_cycle_min[15:0]
W
Reset0000000000000000
Figure 26-93. Protocol Configuration Register 25 (PCR25)
Base + 0x00D4 Write: POC:config
0123456789101112131415
R allow
_halt_
due
_to_
clock
comp_accepted_startup_range_b
micro_per_cycle_max
[19:16]
W
Reset0000000000000000
Figure 26-94. Protocol Configuration Register 26 (PCR26)
Base + 0x00D6 Write: POC:config
0123456789101112131415
R
micro_per_cycle_max[15:0]
W
Reset0000000000000000
Figure 26-95. Protocol Configuration Register 27 (PCR27)
Base + 0x00D8 Write: POC:config
0123456789101112131415
R
dynamic_slot
_idle_phase
macro_after_offset_correction
W
Reset0000000000000000
Figure 26-96. Protocol Configuration Register 28 (PCR28)