NXP Semiconductors PXN2020 - Page 829

Enhanced Modular Input/Output Subsystem (eMIOS200)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 28-7
Table 28-3. eMIOS200 Memory Map
Offset from
EMIOS_BASE
(0xFFFE_4000)
Register Access
1
Reset Value Section/Page
Global Registers
0x0000 EMIOS_MCR—Module Configuration Register R/W 0x0000_0000 28.3.2.1/28-9
0x0004 EMIOS_GFR—Global FLAG Register R 0x0000_0000 28.3.2.2/28-10
0x0008 EMIOS_OUDR—Output Update Disable Register R/W 0x0000_0000 28.3.2.3/28-11
0x000C EMIOS_UCDIS—Stop (Disable) Channel Register R/W 0x0000_0000 28.3.2.4/28-11
0x0010–0x001F Reserved
Unified Channel 0 Registers
0x0020 EMIOS_CADR[0]—Channel A Data Register R/W 0x0000_0000 28.3.2.5/28-12
0x0024 EMIOS_CBDR[0]—Channel B Data Register R/W 0x0000_0000 28.3.2.6/28-12
0x0028 EMIOS_CCNTR[0]—Channel Counter Register R 0x0000_0000 28.3.2.7/28-13
0x002C EMIOS_CCR[0]—Channel Control Register R/W 0x0000_0000 28.3.2.8/28-14
0x0030 EMIOS_CSR[0]—Channel Status Register R 0x0000_0000 28.3.2.9/28-19
0x0034 EMIOS_ALTA[0]
2
—Alternate A Register R/W 0x0000_0000 28.3.2.10/28-20
0x0038–0x003F Reserved
Unified Channel 1 Registers
0x0040 EMIOS_CADR[1]—A Register R/W 0x0000_0000 28.3.2.5/28-12
0x0044 EMIOS_CBDR[1]—B Register R/W 0x0000_0000 28.3.2.6/28-12
0x0048 EMIOS_CCNTR[1]—Counter Register R 0x0000_0000 28.3.2.7/28-13
0x004C EMIOS_CCR[1]—Control Register R/W 0x0000_0000 28.3.2.8/28-14
0x0050 EMIOS_CSR[1]—Status Register R 0x0000_0000 28.3.2.9/28-19
0x0054 EMIOS_ALTA[1]
2
—Alternate A Register R/W 0x0000_0000 28.3.2.10/28-20
0x0058–0x005F Reserved
Unified Channel 2 Registers
0x0060 EMIOS_CADR[2]—A Register R/W 0x0000_0000 28.3.2.5/28-12
0x0064 EMIOS_CBDR[2]—B Register R/W 0x0000_0000 28.3.2.6/28-12
0x0068 EMIOS_CCNTR[2]—Counter Register R 0x0000_0000 28.3.2.7/28-13
0x006C EMIOS_CCR[2]—Control Register R/W 0x0000_0000 28.3.2.8/28-14
0x0070 EMIOS_CSR[2]—Status Register R 0x0000_0000 28.3.2.9/28-19
0x0074 EMIOS_ALTA[2]
2
—Alternate A Register R/W 0x0000_0000 28.3.2.10/28-20
0x0078–0x007F Reserved