NXP Semiconductors PXN2020 - Page 85

Signal Description
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 3-17
PK10 PK[10]
PCS_B[5]
PCS_D[2]
PCS_A[3]
154 00
01
10
11
Port K GPIO
DSPI_B Peripheral Chip Select
DSPI_D Peripheral Chip Select
DSPI_A Peripheral Chip Select
I/O
O
O
O
V
DDE2
SH — — P6
Miscellaneous Pins (9)
EXTAL EXTAL
EXTCLK
— — Main Crystal Oscillator Input
External Clock Input
I
I
V
DDSYN
A EXTAL A14
XTAL XTAL — — Main Crystal Oscillator Output O
V
DDSYN
AXTAL A13
TDI TDI — — JTAG Test Data Input I V
DDE2
SH TDI (Pull Up) J3
TDO TDO — — JTAG Test Data Output O V
DDE2
MH TDO (Pull Up
8
)M3
TMS TMS — — JTAG Test Mode Select Input I V
DDE2
MH TMS (Pull Up) L3
TCK TCK — — JTAG Test Clock Input I V
DDE2
SH TCK (Pull Down) P3
JCOMP JCOMP — — JTAG Compliancy I V
DDE2
SH
JCOMP (Pull Down)
K3
TEST TEST — — Test Mode Select I V
DDE3
IH TEST
9
M13
RESET
RESET — — External Reset I/O V
DDE1
MH RESET (Pull Up) A11
1
The primary signal name is used as the pin label on the BGA map for identification purposes.
2
Each line in the Signal Name column corresponds to a separate signal function on the pin. For all device I/O pins, the primary,
alternate, or GPIO signal functions are designated in the PA field of the System Integration Unit (SIU) PCR registers except
where explicitly noted.
3
The GPIO number is the same as the corresponding pad configuration register (SIU_PCRn) number.
4
The PA bitfield in the SIU_PCRn register selects the signal function for the pin. A dash in the Description field of this table
indicates that this value for PC is reserved on this pin, and should not be used.
5
The pad type is indicated by one or more of the following abbreviations: A–analog, F—fast speed, H–high voltage, I—input-only,
M–medium speed, S–slow speed. For example, pad type SH designates a slow high-voltage pad.
6
The Status During Reset pin is sampled after the internal POR is negated. Prior to exiting POR, the signal has a high
impedance. The terminology used in this column is: O – output, I – input, Up – weak pull up enabled, Down – weak pulldown
enabled, Low – output driven low, High – output driven high. A dash on the left side of the slash denotes that both the input and
output buffers for the pin are off. A dash on the right side of the slash denotes that there is no weak pull up/down enabled on
the pin. The signal name to the left or right of the slash indicates the pin is enabled.
7
The Function After Reset of a GPI function is general purpose input. A dash on the left side of the slash denotes that both the
input and output buffers for the pin are off. A dash on the right side of the slash denotes that there is no weak pull up/down
enabled on the pin.
8
Pullup is enabled only when JCOMP is negated.
9
Tie to V
SS
for normal operation.
Table 3-1. PXN20 Signal Properties (continued)
Pin
Name
1
Supported
Functions
2
GPIO
(PCR)
Num
3
PA
4
Description
I/O
Type
Volt-
age
Pad
Type
5
Status
Package Pin
Locations
During
Reset
6
After
Reset
7
208
BGA