ST STM8S Reference Manual

RM0016 16-bit advanced control timer (TIM1)
Doc ID 14587 Rev 8 149/449
17.4 TIM1 clock/trigger controller
The clock/trigger controller allows the timer clock sources, input triggers, and output triggers
to be configured. The block diagram is shown in Figure 43.
Figure 43. Clock/trigger controller block diagram
17.4.1 Prescaler clock (CK_PSC)
The time base unit prescaler clock (CK_PSC) can be provided by the following clock
sources:
● Internal clock (f
MASTER
)
● External clock mode 1: External timer input (TIx)
● External clock mode 2: External trigger input (ETR)
● Internal trigger inputs (ITRi): using one timer as prescaler for another timer. Refer to
Using one timer as prescaler for another timer on page 158 for more details.
ETR
f
MASTER
Tr ig ge r
Controller
TI1FP1
TI2FP2
TRGI
Controller
Encoder
Interface
Reset, Enable,
Input filter
Polarity Selection & Edge
Detector & Prescaler
ETRP
TGI
ETRF
TIM1_ETR
Mode
Clock/Trigger
TRGO
To other
TRC
TI1F_ED
TRGO from TIM5 (ITR2)
ITR
CK_PSC
To Time Base Unit
From input stage
From input stage
TRGO from TIM6 (ITR0)
Up/Down, Count
timers

ST STM8S Specifications

General

Brand	ST
Model	STM8S
Category	Microcontrollers
Language	English