ST STM8S Reference Manual

Serial peripheral interface (SPI) RM0016
254/449 Doc ID 14587 Rev 8
20.3 SPI functional description
20.3.1 General description
The block diagram of the SPI is shown in Figure 91.
Figure 91. SPI block diagram
The SPI is connected to external devices through four pins:
● MISO: Master In / Slave Out data (port C7). This pin can be used to transmit data in
slave mode and receive data in master mode.
● MOSI: Master Out / Slave In data (port C6). This pin can be used to transmit data in
master mode and receive data in slave mode.
● SCK: Serial Clock output (port C5) for SPI masters and Serial Clock input for SPI
slaves.
● NSS: Slave select (port E5). This is a optional pin to select a slave device. This pin acts
as a ‘chip select’ to let the SPI master communicate with slaves individually and to
avoid contention on the data lines. Slave NSS inputs can be driven by standard I/O
ports on the master device. When configured in master mode (MSTR bit =1) and if NSS
is pulled low, the SPI enters master mode fault state: the MSTR bit is automatically
reset and the device is configured in slave mode (refer to Section 20.3.9: Error flags on
page 269).
A basic example of interconnections between a single master and a single slave is
illustrated in Figure 92.
RX BUFFER
TX BUFFER
SHIFT REGISTER
LSBFirst
READ
WRITE
ADDRESS AND DATA BUS
MOSI
MISO
BAUD RATE GENERATOR
SCK
MASTER CONTROL LOGIC
COMMUNICATION
CONTROL
SPE BR2
BR1 BR0 MSTRCPOL CPHA
BR[2:0]
RXIE
LSB
BIDI
MODE
BIDI
OE
RX
SSM SSI
OVR
MOD
RXNETXE
ERR
TXIE
WK
0
0
00
WKIE
ONLY
0
1
NSS
IE
F
UP
FIRST
BSY
f
MASTER
0
CRC
ERR
CRC
EN
CRC
Next
0

ST STM8S Specifications

General

Brand	ST
Model	STM8S
Category	Microcontrollers
Language	English