ST STM8S Reference Manual

Universal asynchronous receiver transmitter (UART) RM0016
330/449 Doc ID 14587 Rev 8
● The output enable signal for the Smartcard I/O enables driving into a bidirectional line
which is also driven by the Smartcard. This signal is active while transmitting the start
and data bits and transmitting NACK. While transmitting the stop bits this signal is
disabled, so that the UART weakly drives a ‘1’ on the bidirectional line.
Note: 1 A break character is not significant in Smartcard mode. A 00h data with a framing error will
be treated as data and not as a break.
2 No IDLE frame is transmitted when toggling the TEN bit. The IDLE frame (as defined for the
other configurations) is not defined by the ISO protocol.
Figure 126 details how the NACK signal is sampled by the UART. In this example the UART
is transmitting a data and is configured with 1.5 stop bits. The receiver part of the UART is
enabled in order to check the integrity of the data and the NACK signal.
Figure 126. Parity error detection using 1.5 stop bits
The UART can provide a clock to the smartcard through the UART_CK output. In smartcard
mode, UART_CK is not associated to the communication but is simply derived from the
internal peripheral input clock through a 5-bit prescaler. The division ratio is configured in
the prescaler register UART_PSCR. UART_CK frequency can be programmed from
f
MASTER
/2 to f
MASTER
/62, where f
MASTER
is the peripheral input clock.
22.3.12 IrDA SIR ENDEC block
IrDA mode is selected by setting the IREN bit in the UART_CR5 register. The STOP bits in
the UART_CR3 register must be configured to “1 stop bit”. In IrDA mode, the following bits
must be kept cleared:
● LINEN, STOP and CKEN bits in the UART_CR3 register,
● SCEN and HDSEL bits in the UART_CR5 register.
Note: This feature is only available in UART1 and UART2.
The IrDA SIR physical layer specifies use of a Return to Zero, Inverted (RZI) modulation
scheme that represents logic 0 as an infrared light pulse (see Figure 127).
The SIR Transmit encoder modulates the Non Return to Zero (NRZ) transmit bit stream
output from the UART. The output pulse stream is transmitted to an external output driver
and infrared LED. The UART supports only bit rates up to 115.2 kbps for the SIR ENDEC. In
normal mode the transmitted pulse width is specified as 3/16 of a bit period.
1 bit time 1.5 bit time
0.5 bit time 1 bit time
sampling at
8th, 9th, 10th
sampling at
8th, 9th, 10th
sampling at
8th, 9th, 10th
sampling at
16th, 17th, 18th
Bit 7 Parity Bit 1.5 Stop Bit

ST STM8S Specifications

General

Brand	ST
Model	STM8S
Category	Microcontrollers
Language	English