RM0016 Flash program memory and data EEPROM
Doc ID 14587 Rev 8 47/449
Automatic fast byte programming
The programming duration can vary according to the initial content of the target address. If
the word (4 bytes) containing the byte to be programmed is not empty, the whole word is
automatically erased before the program operation. On the contrary if the word is empty, no
erase operation is performed and the programming time is shorter (see t
PROG
in Tabl e
“Flash program memory” in the datasheet).
However, the programming time can be fixed by setting the FIX bit of the FLASH_CR1
register to force the program operation to systematically erase the byte whatever its content
(see Section 4.8.1: Flash control register 1 (FLASH_CR1)). The programming time is
consequently fixed and equal to the sum of the erase and write time (see t
PROG
in Ta bl e
“Flash program memory” in the datasheet).
Note: To write a byte fast (no erase), the whole word (4 bytes) into which it is written must be
erased beforehand. Consequently, It is not possible to do two fast writes to the same word
(without an erase before the second write): The first write will be fast but the second write to
the other byte will require an erase.
4.6.3 Word programming
A word write operation allows an entire 4-byte word to be programmed in one shot, thus
minimizing the programming time.
As for byte programming, word operation is available both for the main program memory and
data EEPROM. On some devices, the read-while-write (RWW) capability is also available
when a word programming operation is performed on the data EEPROM. Refer to the
datasheets for additional information.
● In the main program memory:
The application stops for the duration of the byte program operation.
● In DATA area
– Devices with RWW capability: Program execution does not stop, and the byte
program operation is performed using the read-while-write (RWW) capability in
IAP mode.
– Devices without RWW capability: The application stops for the duration of the byte
program operation.
To program a word, the WPRG/NWPRG bits in the FLASH_CR2 and FLASH_NCR2
registers must be previously set/cleared to enable word programming mode (see
Section 4.8.2: Flash control register 2 (FLASH_CR2) and Section 4.8.2: Flash control
register 2 (FLASH_CR2)). Then, the 4 bytes of the word to be programmed must be loaded
starting with the first address. The programming cycle starts automatically when the 4 bytes
have been written.
As for byte operation, the EOP and the WR_PG_DIS control flags of FLASH_IAPSR,
together with the Flash interrupt, can be used to determine if the operation has been
correctly completed.
4.6.4 Block programming
Block program operations are much faster than byte or word program operations. In a block
program operation, a whole block is programmed or erased in a single programming cycle.
Refer to Ta bl e 5 for details on the block size according to the devices.
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