RM0016 Universal asynchronous receiver transmitter (UART)
Doc ID 14587 Rev 8 317/449
Break character
Setting the SBK bit transmits a break character. The break frame length depends on the M
bit (see Figure 113).
If the SBK bit is set to ‘1’ a break character is sent on the UART_TX line after completing the
current character transmission. This bit is reset by hardware when the break character is
completed (during the stop bit of the break character).The UART inserts a logic 1 bit at the
end of the last break frame to guarantee the recognition of the start bit of the next frame.
Note: The break character is sent without taking into account the number of stop bits. If the UART
is programmed with 2 stop bits, the TX line is pulled low until the end of the first stop bit only.
Then 2 logic 1 bits are inserted before the next character.
Note: If the software resets the SBK bit before the start of break transmission, the break character
is not transmitted. For two consecutive breaks, the SBK bit should be set after the stop bit of
the previous break.
Idle character
Setting the TEN bit drives the UART to send an idle frame before the first data frame.
22.3.3 Receiver
The UART can receive data words of either 8 or 9 bits. When the M bit is set, word length is
9 bits and the MSB is stored in the R8 bit in the UART_CR1 register.
Start bit detection
In the UART, the start bit is detected when a specific sequence of samples is recognized.
This sequence is: 1 1 1 0 X 0 X 0X 0X 0 X 0X 0. The start bit detection sequence shown in
Figure 116.
Figure 116. Start bit detection
RX line
sampled values
Idle Start bitRX state
Real
sample
clock
Ideal
sample
clock
01 0 X0 X 0 00 0 X XX XXX
Conditions
to validate
the start bit
At least 2 bits
out of 3 at 0
At least 2 bits
out of 3 at 0
Falling edge
detection
11
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
X X X X X X X X 9 10 111213141516
6/16
7/16
One-bit time
7/16
X
ai15471
To Next Page
Loading...
Need help?
General
