ST STM8S Reference Manual

Universal asynchronous receiver transmitter (UART) RM0016
318/449 Doc ID 14587 Rev 8
Note: If the sequence is not complete, the start bit detection aborts and the receiver returns to the
idle state (no flag is set), where it waits for a falling edge.
If only 2 out of the 3 bits are at 0 (sampling on the 3
rd
, 5
th
and 7
th
bits or sampling on the 8
th
,
9
th
and 10
th
bits), the start bit is validated but the NF noise flag bit is set.
The start bit is confirmed if the last 3 samples are at 0 (sampling on the 8
th
, 9
th
, and 10
th
bits.
Character reception
During an UART reception, data shifts in least significant bit first through the UART_RX pin.
In this mode, the UART_DR register consists of a buffer (RDR) between the internal bus and
the received shift register (see Figure 2).
Procedure:
1. Program the M bit in UART_CR1 to define the word length.
2. Program the number of stop bits in UART_CR3.
3. Select the desired baud rate by programming the baud rate registers in the following
order:
a) UART_BRR2
b) UART_BRR1
4. Set the REN bit UART_CR2. This enables the receiver which begins searching for a
start bit.
When a character is received
● The RXNE bit is set. It indicates that the content of the shift register is transferred to the
RDR.
● An interrupt is generated if the RIEN bit is set.
● The error flags can be set if a frame error, noise or an overrun error has been detected
during reception.
● Clearing the RXNE bit is performed by a software read to the UART_DR register. The
RXNE flag can also be cleared by writing a zero to it. The RXNE bit must be cleared
before the end of the reception of the next character to avoid an overrun error.
Note: The REN bit should not be reset while receiving data. If the REN bit is disabled during
reception, the reception of the current byte will be aborted.
Break character
When a break character is received, the UART handles it as a framing error.
Idle character
When an idle frame is detected, there is the same procedure as a data received character
plus an interrupt if the ILIEN bit is set.
Overrun error
An overrun error occurs when a character is received when RXNE has not been reset. Data
can not be transferred from the shift register to the RDR register until the RXNE bit is
cleared.

ST STM8S Specifications

General

Brand	ST
Model	STM8S
Category	Microcontrollers
Language	English