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ST STM8S Reference Manual

ST STM8S
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Flash program memory and data EEPROM RM0016
46/449 Doc ID 14587 Rev 8
4.5.3 Enabling write access to option bytes
The procedure for enabling write access to the option byte area is the same as the one used
for data EEPROM. However, the OPT bit in the Flash control register 2 (FLASH_CR2) must
be set, and the corresponding NOPT bit in the Flash complementary control register 2
(FLASH_NCR2) must be cleared to enable write access to the option bytes.
4.6 Memory programming
The main program memory, and the DATA area must be unlocked before attempting to
perform any program operation. The unlock mechanism depends on the memory area to be
programmed as described in Section 4.5.2: Memory access security system (MASS).
4.6.1 Read-while-write (RWW)
The RWW feature allows write operations to be performed on data EEPROM while reading
and executing the program memory. Execution time is therefore optimized. The opposite
operation is not allowed: Data memory cannot be read while writing to the program memory.
This RWW feature is always enabled and can be used at any time. Any access to Flash
control registers FLASH_CR1 and FLASH_CR2 while writing to the memory stalls the CPU,
making RWW unavailable.
Note: The RWW feature is not available on all devices. Refer to the datasheets for addition
information.
4.6.2 Byte programming
The main program memory and the DATA area can be programmed at byte level. To
program one byte, the application writes directly to the target address.
In the main program memory:
The application stops for the duration of the byte program operation.
In DATA area:
Devices with RWW capability: Program execution does not stop, and the byte
program operation is performed using the read-while-write (RWW) capability in
IAP mode.
Devices without RWW capability: The application stops for the duration of the byte
program operation.
To erase a byte, simply write 0x00 at the corresponding address.
The application can read the FLASH_IAPSR register to verify that the programming or
erasing operation has been correctly executed:
EOP flag is set after a successful programming operation
WR_PG_DIS is set when the software has tried to write to a protected page. In this
case, the write procedure is not performed.
As soon as one of these flags are set, a Flash interrupt is generated if it has been previously
enabled by setting the IE bit of the FLASH_CR1 register.

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ST STM8S Specifications

General IconGeneral
BrandST
ModelSTM8S
CategoryMicrocontrollers
LanguageEnglish

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