RM0016 Universal asynchronous receiver transmitter (UART)
Doc ID 14587 Rev 8 351/449
22.7.4 Baud rate register 2 (UART_BRR2)
Address offset: 0x03
Reset value: 0x00
22.7.5 Control register 1 (UART_CR1)
Address offset: 0x04
Reset value: 0x00
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UART_DIV[15:12] UART_DIV[3:0]
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Bits 7:4 UART_DIV[15:12] MSB of UART_DIV.
These 4 bits define the MSB of the UART Divider (UART_DIV)
Bits 3:0 UART_DIV[3:0]: LSB of UART_DIV.
These 4 bits define the LSB of the UART Divider (UART_DIV)
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R8 T8 UARTD M WAKE PCEN PS PIEN
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Bit 7 R8: Receive Data bit 8.
This bit is used to store the 9th bit of the received word when M=1
Bit 6 T8: Transmit data bit 8.
This bit is used to store the 9th bit of the transmitted word when M=1
Bit 5 UARTD: UART Disable (for low power consumption).
When this bit is set the UART prescaler and outputs are stopped at the end of the current byte
transfer in order to reduce power consumption. This bit is set and cleared by software.
0: UART enabled
1: UART prescaler and outputs disabled
Bit 4 M: word length.
This bit determines the word length. It is set or cleared by software.
0: 1 Start bit, 8 Data bits, n Stop bit (n depending on STOP[1:0] bits in the UART_CR3 register)
1: 1 Start bit, 9 Data bits, 1 Stop bit
Note: The M bit must not be modified during a data transfer (both transmission and reception) In LIN
slave mode, the M bit and the STOP[1:0] bits in the UART_CR3 register should be kept at 0.
Bit 3 WAKE: Wakeup method.
This bit determines the UART wakeup method, it is set or cleared by software.
0: Idle Line
1: Address Mark
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