ST STM8S Reference Manual

Controller area network (beCAN) RM0016
396/449 Doc ID 14587 Rev 8
23.11.15 Mailbox registers
This chapter describes the registers of the transmit and receive mailboxes. Refer to
Section 23.6.4: Message storage for detailed register mapping.
Transmit and receive mailboxes have the same registers except:
– CAN_MCSR register in a transmit mailbox is replaced by CAN_MFMIR register in
a receive mailbox.
– A receive mailbox is always write protected.
– A transmit mailbox is write enabled only while empty (the corresponding TME bit in
the CAN_TPR register is set).
Caution: As the mailbox registers usually have no defined reset value, the user should not rely on the
initial setup and should always fill all the configuration bits accordingly.
CAN message control/status register (CAN_MCSR)
Address offset: See Table 65. and Table 66.
Reset value: 0x00
Note: This register is implemented only in transmit mailboxes. In receive mailboxes, the
CAN_MFMIR register is mapped at this location.
76543210
Reserved
TERR ALST TXOK RQCP ABRQ TXRQ
r r r rc_w1 rs rs
Bits 7:6 Reserved.
Bit 5 TERR Transmission error
This bit is updated by hardware after each transmission attempt.
0: The previous transmission was successful
1: The previous transmission failed due to an error
Bit 4 ALST Arbitration lost
This bit is updated by hardware after each transmission attempt.
0: The previous transmission was successful
1: The previous transmission failed due to an arbitration lost
Bit 3 TXOK Transmission OK
The hardware updates this bit after each transmission attempt.
0: The previous transmission failed
1: The previous transmission was successful
Note: This bit has the same value as the corresponding TXOKx bit in the CAN_TSR register.
Bit 2 RQCP Request completed
Set by hardware when the last request (transmit or abort) has been performed.
Cleared by software writing a “1” or by hardware on transmission request.
Note: This bit has the same value as the corresponding RQCPx bit of the CAN_TSR register.
Clearing this bit clears all the status bits (TXOK, ALST and TERR) in the CAN_MCSR register
and the corresponding RQCPx and TXOKx bits in the CAN_TSR register.

ST STM8S Specifications

General

Brand	ST
Model	STM8S
Category	Microcontrollers
Language	English