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ST STM8S Reference Manual

ST STM8S
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RM0016 Universal asynchronous receiver transmitter (UART)
Doc ID 14587 Rev 8 319/449
When an overrun error occurs:
The OR bit is set.
The RDR content will not be lost. The previous data is available when a read to
UART_DR is performed.
The shift register will be overwritten. The second data received during overrun is lost.
An interrupt is generated if the RIEN bit is set.
The OR bit is reset by a read to the UART_SR register followed by a UART_DR register
read operation.
Noise error
Over-sampling techniques are used for data recovery by discriminating between valid
incoming data and noise.
Figure 117. Data sampling for noise detection
Note: The sample clock frequency is 16x baud rate.
RX LINE
Sample
clock
1234567891011
12
13 14 15 16
sampled values
One bit time
6/16
7/16
7/16

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ST STM8S Specifications

General IconGeneral
BrandST
ModelSTM8S
CategoryMicrocontrollers
LanguageEnglish

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