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ST STM8S Reference Manual

ST STM8S
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Inter-integrated circuit (I
2
C) interface RM0016
278/449 Doc ID 14587 Rev 8
21 Inter-integrated circuit (I
2
C) interface
21.1 Introduction
I
2
C (inter-integrated circuit) bus interface serves as an interface between the microcontroller
and the serial I
2
C bus. It provides multi-master capability, and controls all I
2
C bus-specific
sequencing, protocol, arbitration and timing. It supports standard and fast speed modes.
21.2 I
2
C main features
Parallel-bus/I
2
C protocol converter
Multi-master capability: the same interface can act as Master or Slave
I
2
C Master features:
Clock generation
Start and Stop generation
I
2
C Slave features:
Programmable I
2
C Address detection
Stop bit detection
Generation and detection of 7-bit/10-bit addressing and general call
Supports different communication speeds:
Standard speed (up to 100 kHz),
Fast speed (up to 400 kHz)
Status flags:
Transmitter/receiver mode flag
End-of-byte transmission flag
–I
2
C busy flag
Error flags:
Arbitration lost condition for master mode
Acknowledgement failure after address/ data transmission
Detection of misplaced start or stop condition
Overrun/underrun if clock stretching is disabled
3 types of interrupts:
1 communication interrupt
1 error condition interrupt
1 wakeup from Halt interrupt
Wakeup capability:
MCU wakes up from Low power mode on address detection in slave mode.
Optional clock stretching

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ST STM8S Specifications

General IconGeneral
BrandST
ModelSTM8S
CategoryMicrocontrollers
LanguageEnglish

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