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ST STM8S Reference Manual

ST STM8S
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RM0016 Flash program memory and data EEPROM
Doc ID 14587 Rev 8 51/449
4.8 Flash registers
4.8.1 Flash control register 1 (FLASH_CR1)
Address offset: 0x00
Reset value: 0x00
76543210
Reserved
HALT AHALT IE FIX
rw rw rw rw
Bits 7:4 Reserved
Bit 3 HALT: Power-down in Halt mode
This bit is set and cleared by software.
0: Flash in power-down mode when MCU is in Halt mode
1: Flash in operating mode when MCU is in Halt mode
Bit 2 AHALT: Power-down in Active-halt mode
This bit is set and cleared by software.
0: Flash in operating mode when MCU is in Active-halt mode
1: Flash in power-down when MCU is in Active-halt mode
Bit 1 IE: Flash Interrupt enable
This bit is set and cleared by software.
0: Interrupt disabled
1: Interrupt enabled. An interrupt is generated if the EOP or WR_PG_DIS flag in the
FLASH_IAPSR register is set.
Bit 0 FIX: Fixed Byte programming time
This bit is set and cleared by software.
0: Standard programming time of (1/2 t
prog
) if the memory is already erased and t
prog
otherwise.
1: Programming time fixed at t
prog
.

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ST STM8S Specifications

General IconGeneral
BrandST
ModelSTM8S
CategoryMicrocontrollers
LanguageEnglish

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