Analog/digital converter (ADC) RM0016
416/449 Doc ID 14587 Rev 8
Note: When using scan mode, it is not possible to use channels AIN0 to AINn in output mode
because the output stage of each channel is disabled when it is selected by the ADC
multiplexer.
A single conversion is performed for each channel starting with AIN0 and the data is stored
in the data buffer registers ADC_DBxR. When the last channel (channel ‘n’) has been
converted, the EOC (End of Conversion) flag is set and an interrupt is generated if the
EOCIE bit is set.
The converted values for each channel can be read from the data buffer registers. The OVR
flag is set if one of the data buffer registers is overwritten before it has been read (see
Section 24.5.5).
Do not clear the SCAN bit while the conversion sequence is in progress. Single scan mode
can be stopped immediately by clearing the ADON bit.
To start a new SCAN conversion, clear the EOC bit and set the ADON bit in the ADC_CR1
register.
Continuous scan mode
This mode is like single scan mode except that each time the last channel has been
converted, a new scan conversion from channel 0 to channel n starts automatically. The
OVR flag is set if one of the data buffer registers is overwritten before it has been read (see
Section 24.5.5).
Continuous scan mode is started by setting the ADON bit while the SCAN and CONT bits
are set.
Do not clear the SCAN bit while scan conversion is in progress.
Continuous scan mode can be stopped immediately by clearing the ADON bit. Alternatively
if the CONT bit is cleared while conversion is ongoing, conversion stops the next time the
last channel has been converted.
Caution: In scan mode, do not use a bit manipulation instruction (BRES) to clear the EOC flag. This is
because this performs a read-modify-write on the whole ADC_CSR register, reading the
current channel number from the CH[3:0] register and writing it back, which changes the last
channel number for the scan sequence.
The correct way to clear the EOC flag in continuous scan mode is to load a byte in the
ADC_CSR register from a RAM variable, clearing the EOC flag and reloading the last
channel number for the scan sequence
24.5.5 Overrun flag
The OVR error flag is set by hardware in buffered continuous mode, single scan or
continuous scan modes. It indicates that one of the ten data buffer registers was overwritten
by a new converted value before the previous value was read. In this case, it is
recommended to start a new conversion.
Note: Setting the ADON bit automatically clears the OVR flag.
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