ST STM8S Reference Manual

16-bit advanced control timer (TIM1) RM0016
202/449 Doc ID 14587 Rev 8
Bit 0 CC1E: Capture/compare 1 output enable
CC1 channel is configured as output:
0: Off - OC1 is not active. OC1 level is then a function of the MOE, OSSI, OSSR, OIS1, OIS1N and
CC1NE bits.
1: On - OC1 signal is output on the corresponding output pin depending on the MOE, OSSI, OSSR,
OIS1, OIS1N and CC1NE bits.
CC1 channel is configured as input:
This bit determines if a capture of the counter value can be made in the input capture/compare
register 1 (TIM1_CCR1) or not.
0: Capture disabled
1: Capture enabled
Note: On channels that have a complementary output, this bit is preloaded. If the CCPC bit is set in
the TIM1_CR2 register, the CC1E active bit takes the new value from the preload bit only when
a COM is generated.
Table 38. Output control for complementary OCi and OCiN channels with break feature
(1)
Control bits Output states
MOE OSSI OSSR CCiE CCiNE OCi OCiN
1x
(2)
000
Output disabled
(not driven by the timer)
Output disabled
(not driven by the timer)
001
Output disabled
(not driven by the timer)
OCiREF + polarity OCiN =
OCiREF xor CCiNP
010
OCiREF + polarity OCi =
OCiREF xor CCiP
Output disabled
(not driven by the timer)
011OCiREF + polarity + deadtime
Complementary to OCiREF
(not OCiREF) + polarity +
deadtime
100
Output disabled
(not driven by the timer)
Output disabled
(not driven by the timer)
101
Off state
(output enabled with inactive
state) OCi = CCiP
OCiREF + polarity OCiN =
OCiREF xor CCiNP
110
OCiREF + polarity OCi =
OCiREF xor CCiP
Off state
(output enabled with inactive
state) OCiN = CCiNP
1 1 1 OCiREF + polarity + deadtime
Complementary to OCiREF
(not OCiREF) + polarity +
deadtime

ST STM8S Specifications

General

Brand	ST
Model	STM8S
Category	Microcontrollers
Language	English