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ST STM8S

ST STM8S
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RM0016 Flash program memory and data EEPROM
Doc ID 14587 Rev 8 53/449
4.8.3 Flash complementary control register 2 (FLASH_NCR2)
Address offset: 0x02
Reset value: 0xFF
76543210
NOPT NWPRG NERASE NFPRG
Reserved
NPRG
rw rw rw rw rw
Bit 7 NOPT: Write option bytes
This bit is set and cleared by software.
0: Write access to option bytes enabled
1: Write access to option bytes disabled
Bit 6 NWPRG: Word programming
This bit is cleared by software and set by hardware when the operation is completed.
0: Word programming enabled
1: Word programming disabled
Bit 5 NERASE: Block erase
This bit is cleared by software and set by hardware when the operation is completed.
0: Block erase enabled
1: Block erase disabled
Bit 4 NFPRG: Fast block programming
This bit is cleared by software and set by software reading the register.
0: Fast block programming enabled (no erase before programming, the programmed data
values are not guaranteed when the block is not blank (fully erased) before the operation)
1: Fast block programming disabled
Bits 3:1 Reserved.
Bit 0 NPRG: Block programming
This bit is cleared by software and set by hardware when the operation is completed.
0: Block programming enabled
1: Block programming disabled

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