ST STM8S

Inter-integrated circuit (I
2
C) interface RM0016
296/449 Doc ID 14587 Rev 8
21.7.3 Frequency register (I2C_FREQR)
Address offset: 0x02
Reset value: 0x00
76543210
Reserved
FREQ[5:0]
rw
Bits 7:6 Reserved
Bits 5:0 FREQ[5:0] Peripheral clock frequency.
(1)
Input clock frequency must be programmed to generate correct timings:
The allowed range is between 1 MHz and 24 MHz
000000: not allowed
000001: 1 MHz
000010: 2 MHz
...
011000: 24 MHz
Higher values: not allowed
1. The minimum peripheral clock frequencies for respecting the I
2
C bus timings are:
1 MHz for standard mode and 4 MHz for fast mode