EasyManua.ls Logo

NXP Semiconductors PXN2020 - Page 1366

NXP Semiconductors PXN2020
1376 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
A-108 Freescale Semiconductor
0x0688
SIU_GPDO136_139 —GPIO pin data output register 136 – 139
R/W 0x0000_0000 8.3.2.14/8-26
0x068C
SIU_GPDO140_143 —GPIO pin data output register 140 – 143
R/W 0x0000_0000 8.3.2.14/8-26
0x0690
SIU_GPDO144_147 —GPIO pin data output register 144 – 147
R/W 0x0000_0000 8.3.2.14/8-26
0x0694
SIU_GPDO148_151—GPIO pin data output register 148 – 151
R/W 0x0000_0000 8.3.2.14/8-26
0x0698
SIU_GPDO152_154 —GPIO pin data output register 152 – 154
R/W 0x0000_0000 8.3.2.14/8-26
0x0690–0x07FF Reserved
0x0800 SIU_GPDI0_3—GPIO pin data input register 0
3R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0804 SIU_GPDI4_7—GPIO pin data input register 4 – 7 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0808 SIU_GPDI8_11—GPIO pin data input register 8 – 11 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x080C SIU_GPDI12_15—GPIO pin data input register 12 – 15 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0810 SIU_GPDI16_19—GPIO pin data input register 16 – 19 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0814 SIU_GPDI20_23—GPIO pin data input register 20 – 23 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0818 SIU_GPDI24_27—GPIO pin data input register 24 – 27 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x081C SIU_GPDI28_31—GPIO pin data input register 28 – 31 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0820 SIU_GPDI32_35—GPIO pin data input register 32 – 35 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0824 SIU_GPDI36_39—GPIO pin data input register 36 – 39 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0828 SIU_GPDI40_43—GPIO pin data input register 40 – 43 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x082C SIU_GPDI44_47—GPIO pin data input register 44 – 47 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0830 SIU_GPDI48_51—GPIO pin data input register 48 – 51 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0834 SIU_GPDI52_55—GPIO pin data input register 52 – 55 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0838 SIU_GPDI56_59—GPIO pin data input register 56 – 59 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x083C SIU_GPDI60_63—GPIO pin data input register 60 – 63 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0840 SIU_GPDI64_67—GPIO pin data input register 64 – 67 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0844 SIU_GPDI68_71—GPIO pin data input register 68 – 71 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0848 SIU_GPDI72_75—GPIO pin data input register 72 – 75 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x084C SIU_GPDI76_79—GPIO pin data input register 76 – 79 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0850 SIU_GPDI80_83—GPIO pin data input register 80 – 83 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0854 SIU_GPDI84_87—GPIO pin data input register 84 – 87 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0858 SIU_GPDI88_91—GPIO pin data input register 88 – 91 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x085C SIU_GPDI92_95—GPIO pin data input register 92 – 95 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0860 SIU_GPDI96_99—GPIO pin data input register 96 – 99 R/W
0x0U0U_0U0U
8.3.2.15/8-28
0x0864
SIU_GPDI100_103—GPIO pin data input register 100 – 103
R/W
0x0U0U_0U0U
8.3.2.15/8-28
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page

Table of Contents

Related product manuals