NXP Semiconductors PXN2020 - Page 152

Clocks, Reset, and Power (CRP)
PXN20 Microcontroller Reference Manual, Rev. 1
6-20 Freescale Semiconductor
Figure 6-15. SLEEP Mode Entry Diagram
(Run Mode)
Mode Transition: RUN
SLEEP
INIT
T
F
F
F
F
T
T
T
Sleep
debug
enabled?
Set Sleep
Handshake bit
in NPC PCR
Handshake
bit cleared?
- Acknowledge clock
stop ready to CCB
Clock stop
asserted
by CCB?
wait
5 clks
3 clks
Request
Assert clock stop
to clock control block
- Assert TDO OBE
Go to Figure 6-16