Clocks, Reset, and Power (CRP)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 6-21
Figure 6-16. SLEEP Mode Transition Diagram (Part 1)
- Enable isolation
for mem/analog blks
- Isolate CRP block
- Safe state pads
- Disable isolation
Mode Transition:
1
2
3
4
5
6
7
8
9
10
wakeup = 0
wait
50 usec
wakeup = 1
10 clocks
(disable 16M IRC & clkgate,
if not wakeup or RTC clock)
wait
- Assert system POR
1-3 clks from wakeup
edge if 16 MHz_IRC
enabled (depends
on where pin
wakeup edge
occurred), 3 clks +
16 MHz_IRC start up
time if disabled
SLEEP
RUN
- Negate PMC run
- Disable LVI
(LVI12 still active)
- Bias resistor off
- Assert PMC run
- Assert run
(pgates)
2 clks
wait
- Negate prerun
(pgates)
-Negate run
(pgates)
- RAMs sbias
- Assert prerun
(pgates)
- Enable Wakeup
- RAMs in standby
- Bias resistor on
From Figure 6-15
- Enable LVIs
- Bias resistor on
Go to Figure 6-17
- Start clocks
11 12
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