Frequency Modulated Phase-Locked Loop (FMPLL)
PXN20 Microcontroller Reference Manual, Rev. 1
7-8 Freescale Semiconductor
Offset: FMPLL_BASE_ADDR + 0x000C Access: User read/write
01234567 8 9 101112131415
R 0 0 0 0 0 0 0 0
LOCEN LOLRE LOCRE
LOL
IRQ
LOC
IRQ
0
ERATE
W
Reset00000000 0 0 0 00000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0
EDEPTH
0 0
ERFD
W
Reset00000000 0 0 0 0 0 0 1 1
Figure 7-4. FMPLL Enhanced Synthesizer Control Register 2 (ESYNCR2)
Table 7-7. ESYNCR2 Field Descriptions
Field Description
LOCEN Loss-of-Clock Enable. The LOCEN bit determines whether the loss-of-clock function is operational along with
backup clock modes, and interrupt and reset functions. See Section 7.4.3.2, Loss-of-Clock Detection, for
more information.
In PLL Off mode, this bit has no effect.
LOCEN does not affect the loss-of-lock circuitry.
0 Loss-of-clock disabled.
1 Loss-of-clock enabled.
LOLRE Loss-of-Lock Reset Enable. The LOLRE bit determines how the integration module handles a loss-of-lock
indication. See Section 7.4.3.1, PLL Lock Detection, for more information.
When operating in normal PLL mode, the PLL must be locked before setting the LOLRE bit. Otherwise reset
is immediately asserted.
The LOLRE bit has no effect in PLL Off mode.
0 Assert reset on loss of lock is disabled.
1 Assert reset on loss of lock.
LOCRE Loss-of-Clock Reset Enable. The LOCRE bit determines how the integration module handles a loss-of-clock
condition when LOCEN is equal to 1. LOCRE has no effect when LOCEN is equal to 0.
If the LOCF bit in the SYNSR indicates a loss-of-clock condition, setting the LOCRE bit causes an immediate
reset.
The LOCRE bit has no effect in PLL Off mode.
0 Assert reset on loss of clock is disabled.
1 Assert reset on loss of clock.
LOLIRQ Loss-of-Lock Interrupt Request. The LOLIRQ bit determines how the integration module handles a
loss-of-lock indication. See Section 7.6.1, Loss-of-Lock Interrupt Request, for more information.
When operating in normal mode, the PLL must be locked before setting the LOLIRQ bit. Otherwise an
interrupt is immediately requested.
The LOLIRQ bit has no effect in PLL Off mode.
0 Request interrupt is disabled.
1 Request interrupt.
LOCIRQ Loss- of-Clock Interrupt Request. The LOCIRQ bit determines how the integration module handles a loss-
of-clock condition when LOCEN = 1. LOCIRQ has no effect when LOCEN = 0.
If the LOCF bit in the SYNSR indicates a loss-of-clock condition, setting (or having previously set) the
LOCIRQ bit causes an interrupt request.
The LOCIRQ bit has no effect in PLL Off mode.
0 Request interrupt on loss of clock is disabled.
1 Request interrupt on loss of clock.
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