NXP Semiconductors PXN2020 - Page 680

FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
26-66 Freescale Semiconductor
cluster_drift_damping pClusterDriftDamping
T24
comp_accepted_startup_range_a pdAcceptedStartupRange -
pDelayCompensation[A]
T22
comp_accepted_startup_range_b pdAcceptedStartupRange -
pDelayCompensation[B]
T26
listen_timeout pdListenTimeout - 1
T 14/15
key_slot_id pKeySlotId
number 18
key_slot_used_for_startup pKeySlotUsedForStartup
bool 11
key_slot_used_for_sync pKeySlotUsedForSync
bool 11
latest_tx gNumberOfMinislots - pLatestTx
minislot 21
sync_node_max gSyncNodeMax
number 30
micro_initial_offset_a pMicroInitialOffset[A]
T20
micro_initial_offset_b pMicroInitialOffset[B]
T20
micro_per_cycle pMicroPerCycle
T 22/23
micro_per_cycle_min pMicroPerCycle - pdMaxDrift
T 24/25
micro_per_cycle_max pMicroPerCycle + pdMaxDrift
T 26/27
micro_per_macro_nom_half round(pMicroPerMacroNom / 2)
T7
offset_correction_out pOffsetCorrectionOut
T9
rate_correction_out pRateCorrectionOut
T14
single_slot_enabled pSingleSlotEnabled
bool 10
wakeup_channel pWakeupChannel see Table 26-78 10
wakeup_pattern pWakeupPattern
number 18
decoding_correction_a pDecodingCorrection +
pDelayCompensation[A] + 2
T19
decoding_correction_b pDecodingCorrection +
pDelayCompensation[B] + 2
T7
key_slot_header_crc header CRC for key slot 0x000 0x7FF number 12
extern_offset_correction pExternOffsetCorrection
T29
extern_rate_correction pExternRateCorrection
T21
1
See FlexRay Communications System Protocol Specification, Version 2.1 Rev A for detailed protocol parameter definitions
Table 26-78. Wakeup Channel Selection
wakeup_channel Wakeup Channel
0A
1B
Table 26-77. Protocol Configuration Register Fields (continued)
Name Description
1
Min Max Unit PCR