NXP Semiconductors PXN2020 - Page 777

Media Local Bus (MLB)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 27-5
0x0000_001C VCCR—Version Control Configuration Register R
0x0000_0020 SBCR—Synchronous Base Address Configuration Register R/W
0x0000_0024 ABCR—Asynchronous Base Address Configuration Register R/W
0x0000_0028 CBCR—Control Base Address Configuration Register R/W
0x0000_002C IBCR—Isochronous Base Address Configuration Register R/W
0x0000_0030 CICR—Channel Interrupt Configuration Register R
Table 27-6. Channel Configuration Registers
Offset from
MLB_BASE
(
0xC3F8_4000)
Channel n Register (n = 0..15)
Access
0x0010 + n × 0x10 CECRn—Channel n Entry Configuration Register R/W
0x0014 + n × 0x10 CSCRn—Channel n Status Configuration Register R/W
0x0018 + n × 0x10 CCBCRn—Channel n Current Buffer Configuration Register R
0x001A + n × 10 CNBCRn—Channel n Next Buffer Configuration Register R/W
0x0280 + n × 0x04 LCBCRn—Local Channel n Buffer Configuration Register R/W
Table 27-7. MLB Memory Map
Offset from
MLB_BASE
(0xC3F8_4000)
Register Access Reset Value Section/Page
0x0000 DCCR—Device Control Configuration Register R/W
1
0x0000_0000 27.3.2.1/27-8
0x0004 SSCR—System Status Configuration Register R/W 0x0000_0000 27.3.2.2/27-10
0x0008 SDCR—System Data Configuration Register R 0x0000_0000 27.3.2.3/27-11
0x000C SMCR—System Mask Configuration Register R/W 0x0000_0060 27.3.2.4/27-12
0x001C VCCR—Version Control Configuration Register R 0x0300_0202 27.3.2.5/27-13
0x0020 SBCR—Synchronous Base Address Configuration Register R/W 0x0000_0000 27.3.2.6/27-14
0x0024 ABCR—Asynchronous Base Address Configuration Register R/W 0x0000_0000 27.3.2.7/27-14
0x0028 CBCR—Control Base Address Configuration Register R/W 0x0000_0000 27.3.2.8/27-15
0x002C IBCR—Isochronous Base Address Configuration Register R/W 0x0000_0000 27.3.2.9/27-16
0x0030 CICR—Channel Interrupt Configuration Register R 0x0000_0000 27.3.2.10/27-16
0x0040 CECR0—Channel 0 Entry Configuration Register R/W 0x0000_0000 27.3.2.11/27-17
0x0044 CSCR0—Channel 0 Status Configuration Register R/W 0x8000_0000 27.3.2.12/27-19
Table 27-5. Configuration Registers (continued)
Offset from
MLB_BASE
(
0xC3F8_4000)
Name Access