RM0016 Flash program memory and data EEPROM
Doc ID 14587 Rev 8 37/449
device hardware features. The options bytes can be programmed in user, IAP and
ICP/SWIM modes.
● High density STM8A devices
– From 32 to 128 Kbytes of Flash program memory organized in up to 256 pages of
4 blocks of 128 bytes each. The Flash program memory is divided into 2 areas, the
user boot code area (UBC), which size can be configured by option byte, and the
main program memory area. The Flash program memory is mapped in the upper
part of the STM8A addressing space and includes the reset and interrupt vectors.
– Up to 2 Kbytes of data EEPROM (DATA) organized in up to 4 pages of 4 blocks of
128 bytes each. The size of the DATA area is fixed for a given microcontroller. One
block (128 bytes) contains the option bytes of which 15 are used to configure the
device hardware features. The options bytes can be programmed in user, IAP and
ICP/SWIM modes.
The page defines the granularity of the user boot code area as described in Section 4.4.3:
User boot area (UBC).
Figure 6, Figure 7, and Figure 8 show the Flash memory and data EEPROM organization
for STM8S and STM8A devices. Refer to the STM8S and STM8A programming manual
(PM0051) for more information.
Note: The EEPROM access time allows the device to run up to 16 MHz. For clock frequencies
above 16 MHz, Flash/data EEPROM access must be configured for 1 wait state. This is
enabled by the device option byte (refer to the option bytes section of the STM8S and
STM8A datasheets).
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