ST STM8S Reference Manual

RM0016 Revision history
Doc ID 14587 Rev 8 443/449
31-Jan-2011 7
Merge with STM8A reference manual (RM0009).
Renamed low power modes, Halt, Active-halt, Wait, and Run in the
whole document.
Added overview of STM8S and STM8A device families on
coverpage.
Section 2: Boot ROM: added LIN mode configuration.
Section 3: Memory and register map:
– Updated Section 3.1.1: Memory map to cover both STM8A and
STM8S devices.
– Added Section 3.1.2: Stack handling.
Section 4: Flash program memory and data EEPROM
– Updated Flash program memory and SRAM size for medium
density STM8S and STM8A devices in Section 4.4.1: STM8S and
STM8A memory organization.
– Added Note 1 below Figure 7: Flash memory and data EEPROM
organization on medium density STM8S and STM8A.
– Added 32 Kbyte and 128 Kbyte STM8A devices and Section 4.4.2:
Memory access/ wait state configuration.
– Section 4.5.1: Readout protection: added DM mode when readout
protection is enabled, and Section : Temporarily removing the
readout protection.
– Added case of FLASH_CR1/FLASH_CR2 access during memory
write operation in Section 4.6.1: Read-while-write (RWW).
– Moved all information related to temporary memory unprotection to
dedicated application note.
Section 7: Power supply:
– Removed minimum VCAP value in Power section overview.
Section 8: Reset (RST):
– Changed EMS to EMC.
– Added Section 8.1: “Reset state” and “under reset” definitions
.
– Replace numerical values by t
OP(NRST) and
t
INFP(NRST)
in
Section 8.2: Reset circuit description
.
Section 9: Clock control (CLK):
– Added Table 14: Devices with 4 trimming bits and Ta bl e 1 5:
Devices with 3 trimming bits in Section 9.1.2: HSI.
– Updated CLK_HSITRIMR, CLK_SWIMCCR, and CLK_SWCR
reset values.
Section 10: Power management:
– Updated Fast clock wakeup in Section 10.2.3: Active-halt modes.
Section 6: Interrupt controller (ITC):
– Added caution note concerning interrupt disabling inside an ISR in
Section 6.2: Interrupt masking and processing flow.
– Added Push CC instruction in Table 11: Dedicated interrupt
instruction set.
– Removed note 3 in Section 6.2.1: Servicing pending interrupts.
Removed case of TRAP interruption by TLI in Section 6.2.2:
Interrupt sources.
– Removed Halt mode and HALT instruction from Section 6.4:
Activation level/low power mode control.
Table 78. Document revision history (continued)
Date Revision Changes

ST STM8S Specifications

General

Brand	ST
Model	STM8S
Category	Microcontrollers
Language	English