Color Liquid Crystal Display Controller LH79524/LH79525 User’s Guide
4-8 Version 1.0
4.3.6 Palette RAM
The CLCDC includes a 256 × 16 bit dual-port RAM-based palette. The least-significant bit
of the serialized pixel data selects the upper or lower half of the palette RAM, based on the
Byte Ordering Mode. Table 4-4 and Table 4-5 show the representations of each word.
• One port of the dual-port palette RAM is used as a Read/Write port and is connected to
the AHB slave interface. Palette entries can be written and verified through this port.
• The second port of the dual-port palette RAM is used as a Read Only port and is
connected to the unpacker and grayscaler.
• In 12 and 16 bpp TFT mode, the palette is bypassed and the output of the pixel serializer
is used as the TFT panel data.
NOTE: *Blue and red palette data can be swapped by programming CTRL:BGR.
NOTE: *Blue and red palette data can be swapped by programming CTRL:BGR.
Table 4-4. Palette Data Storage (LH79525 with 12-Bit CLCDC)
BIT NAME* DESCRIPTION
31 /// Unused
30:27 MB[3:0] Most Significant Blue palette data
26 /// Unused
25:22 MG[3:0] Most Significant Green palette data
21 /// Unused
20:17 MR[3:0] Most Significant Red palette data
16:15 /// Unused
14:11 LB[3:0] Least Significant Blue palette data
10 /// Unused
9:6 LG[3:0] Least Significant Green palette data
5 /// Unused
4:1 LR[3:0] Least Significant Red palette data
0 /// Unused
Table 4-5. Palette Data Storage (LH79524 with 16-Bit CLCDC)
BIT NAME* DESCRIPTION
31 I Intensity
30:26 MB[4:0] Most Significant Blue palette data
25:21 MG[4:0] Most Significant Green palette data
20:16 MR[4:0] Most Significant Red palette data
15 I Intensity
14:10 LB[4:0] Least Significant Blue palette data
9:5 LG[4:0] Least Significant Green palette data
4:0 LR[4:0] Least Significant Red palette data
To Next Page
Loading...