Sharp LH79524 - Ncs1 Override Register (CS1 OV); Table 3-10. CS1 OV Register; Table 3-11. CS1 OV Fields

LH79524/LH79525 User’s Guide Boot Controller
Version 1.0 3-9
3.2.3 nCS1 Override Register (CS1OV)
Bit 0 in the CS1OV register programs the function of the nCS1 signal. This bit has different
functions for read and write. Reading returns the nCS1 Override Enable current status.
Writing programs the nCS1 Override Control function.
During normal boot from the internal Boot ROM, CS1OV is programmed to 1 and PBC is
programmed to 0bX1XX, an override of nCS1 occurs and CS1O will read as 1, resulting
in the Boot ROM using nCS1 as chip select. This override can be disabled by writing a 0
to CS1O, causing CS1O to read as 0.
If on system reset the boot configuration is set to 0bX0XX, nCS1 remains mapped as
described above, CS1O has no effect on the memory map and CS1O will reads as 0.
The very last thing Boot ROM software should do before returning control to the operating
system is to write a 0 to this register so that normal routing of the nCS1 signal occurs.
NOTE: *Resets to the value to which PC[6] is externally driven during power-on reset.
Table 3-10. CS1OV Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD ///
CS1O
RESET 000000000000000
*
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RW
ADDR 0xFFFE6000 + 0x04
Table 3-11. CS1OV Fields
BITS NAME DESCRIPTION
31:1 /// Reserved Reading returns 0. Write the reset value.
0CS1O
Read: nCS1 Override Enable
1 = nCS1 override is enabled. The override only occurs when PBC[3] = 1 and
CS1O is programmed to 1.
0 = nCS1 override is disabled; nCS1 is routed for normal operation
Write: nCS1 Override Control
1 = enable nCS1 override
0 = disable nCS1 override