LH79524/LH79525 User’s Guide Ethernet MAC Controller
Version 1.0 6-27
6.3.2.5 Receive Buffer Queue Pointer (RXBQP)
This register points to the entry in the receive buffer queue (descriptor list) currently being
used. It is written with the start location of the receive buffer descriptor list. The lower order
bits increment as buffers are used up and wrap to their original values after either 1,024
buffers, or when bit 1 of the entry is set. Reading this register returns the location of the
descriptor currently being accessed. This value increments as buffers are used.
Software should not use this register for determining where to remove received frames
from the queue as it constantly changes as new frames are received. Software should
instead work its way through the buffer descriptor queue checking the ‘used’ bits.
Receive buffer writes also comprise bursts of two words, and as with transmit buffer reads,
it is recommended that bit 2 is always written with zero to prevent a burst from crossing a
1KB boundary, in violation of Section 3.6 of the AMBA specification.
Table 6-14. RXBQP Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD RXBQP
RESET 0000000000000000
TYPE RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD RXBQP ///
RESET 0000000000000000
TYPE RW RW RW RW RW RW RW RW RW RW RW RW RW RW RO RO
ADDR 0xFFFC7000 + 0x18
Table 6-15. RXBQP Fields
BITS NAME FUNCTION
31:2 RXBQP
Receive Buffer Queue Pointer Written with the address of the start of
the receive queue, reads as a pointer to the current buffer being used.
1:0 /// Reserved Reading returns 0. Write the reset value.
To Next Page
Loading...