Sharp LH79524 - Counter Reset Register (RST); Table 19-4. RST Description; Table 19-5. RST Field

Watchdog Timer LH79524/LH79525 User’s Guide
19-6 Version 1.0
19.2.2.2 Counter Reset Register (RST)
Write this register to reset the WDT, preventing a timeout.
Table 19-4. RST Description
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
TYPE RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD RST
RESET undefined
TYPE WO WO WO WO WO WO WO WO WO WO WO WO WO WO WO WO
ADDR 0xFFFE3000 + 0x04
Table 19-5. RST Field
BIT NAME DESCRIPTION
31:16 /// Reserved Reading this field returns 0. Write the reset value.
15:0 RST
Reset Write 0x1984 to this register to reset the WDT and commence counting
down. If the first timeout interrupt is asserted, this write deasserts the interrupt.