Sharp LH79524 - Table 14-9. SR Register; Table 14-10. SR Fields; Status Register (SR)

Synchronous Serial Port LH79524/LH79525 User’s Guide
14-14 Version 1.0
14.2.2.4 Status Register (SR)
SR is the Status Register. This register contains bits that indicate the FIFO fill status and
the SSP busy status.
Table 14-9. SR Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD /// BSY REFI RNE TNF TFE
RESET 0000000000000011
RW WWWWWWWWWWWRORORORORO
ADDR 0xFFFC6000 + 0x00C
Table 14-10. SR Fields
BITS NAME DESCRIPTION
31:16 ///
Reserved Writing to these bits has no effect. Reading returns 0.
15:5 /// Reserved Write as zero. Unpredictable behavior when read.
4BSY
SSP Busy Flag
1 = SSP is transmitting/receiving a frame or the transmit FIFO is non-empty
0 = SSP is idle
3REFI
Receive FIFO Full
1 = Receive FIFO is full
0 = Receive FIFO is not full
2RNE
Receive FIFO Not Empty
1 = Receive FIFO is not empty
0 = Receive FIFO is empty
1TNF
Transmit FIFO Not Full
1 = Transmit FIFO is not full
0 = Transmit FIFO is full
0TFE
Transmit FIFO Empty
1 = Transmit FIFO is empty
0 = Transmit FIFO is not empty