Sharp LH79524 - Masked Interrupt Status Register (MIS); Table 2-27. MIS Register; Table 2-28. MIS Fields

LH79524/LH79525 User’s Guide Analog-to-Digital Converter/Brownout Detector
Version 1.0 2-25
2.2.2.13 Masked Interrupt Status Register (MIS)
MIS is the Masked Interrupt Status register. This Read Only register gives the masked
value of each interrupt. The BROWNOUT, PENSYNC, and EOS interrupts are latched and
must be cleared by writing to the Interrupt Clear (IC) register. The FWATER and FOVRN
interrupts are cleared when the contents of the FIFO no longer exceed their thresholds.
Table 2-27. MIS Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD ///
BROWNOUT
PENSYNC
EOSINTR
FWATERINTR
FOVRNINTR
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
ADDR 0xFFFC3000 + 0xAC
Table 2-28. MIS Fields
BIT NAME DESCRIPTION
31:5 /// Reserved Reading returns 0. Write the reset value.
4 BROWNOUT
Brown-Out Interrupt Status
1 = Brown-out Interrupt is asserted
0 = Brown-out Interrupt is not active or not enabled
3 PENSYNC
Pen Interrupt Status
1 = Pen Interrupt is asserted
0 = Pen Interrupt is not active or not enabled
2 EOSINTR
End-of-Sequence Interrupt Active
1 = EOSIA Interrupt is asserted
0 = EOSIA Interrupt is not active or not enabled
1 FWATERINTR
FIFO Watermark Interrupt Active
1 = FIFO Watermark Interrupt is asserted
0 = FIFO Watermark Interrupt is not active or not enabled
0 FOVRNINTR
FIFO Overrun Interrupt Active
1 = FIFO Overrun Interrupt is asserted
0 = FIFO Overrun Interrupt is not active or not enabled