Sharp LH79524 - Table 15-28. T1 Capn Register; Table 15-29. T1 Capn Register Definitions; Timer 1 Capture Registers (T1 Capn)

LH79524/LH79525 User’s Guide Timers
Version 1.0 15-21
15.2.2.13 Timer 1 Capture Registers (T1CAPn)
There are two T1CAPn Registers for Timer 1. They are designated:
• T1CAPA
• T1CAPB
Each register is a 16-bit, Read Only register. When a capture condition occurs, the con-
tents of the counter CNT1 are stored into the associated Capture Register. Capture Reg-
isters correspond to the input signals CTCAP1A through CTCAP1B, respectively. The
edge of the input signal used to trigger the capturing operation is determined by program-
ming the CTRL1 Register.
Table 15-28. T1CAPn Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD CAPTURE1
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
ADDR
T1CAPA: 0xFFFC4000 + 0x48
T1CAPB: 0xFFFC4000 + 0x4C
Table 15-29. T1CAPn Register Definitions
BITS NAME DESCRIPTION
31:16 ///
Reserved Reading this field returns 0. Write the reset value.
15:0 CAPTURE1 Timer 1 Capture 16-bit Capture Register Value.