Sharp LH79524 - Table 18-25. Vectctrlx Registers; Table 18-26. Vectctrlx Fields; Vector Control Registers (Vectctrlx)

Vectored Interrupt Controller LH79524/LH79525 User’s Guide
18-14 Version 1.0
18.2.2.12 Vector Control Registers (VECTCTRLx)
There are 16 Vector Control Registers, designated VECTCTRL0 through VECTCTRL15.
Software uses these registers to assign the desired interrupt to the desired interrupt vector.
The interrupt number from Table 18-1 (in hexadecimal) is programmed to the IntSource
bits, and the ‘E’ bit is set to enable that vector.
Vectored interrupts are only generated if the interrupt is enabled in the INTENABLE Register,
and the interrupt is programmed to generate an IRQ interrupt in the INTSELECT Register.
This prevents multiple interrupts from being generated by a single request if the controller is
incorrectly programmed.
Table 18-25. VECTCTRLx Registers
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD /// E IntSource
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RW RW RW RW RW RW
ADDR
VECTCTRL0: 0xFFFFF000 +
0x200
VECTCTRL1: 0xFFFFF000 + 0x204
VECTCTRL2: 0xFFFFF000 + 0x208
VECTCTRL3: 0xFFFFF000 + 0x20C
VECTCTRL4: 0xFFFFF000 + 0x210
VECTCTRL5: 0xFFFFF000 + 0x214
VECTCTRL6: 0xFFFFF000 + 0x218
VECTCTRL7: 0xFFFFF000 + 0x21C
VECTCTRL8: 0xFFFFF000 + 0x220
VECTCTRL9: 0xFFFFF000 + 0x224
VECTCTRL10: 0xFFFFF000 + 0x228
VECTCTRL11: 0xFFFFF000 + 0x22C
VECTCTRL12: 0xFFFFF000 + 0x230
VECTCTRL13: 0xFFFFF000 + 0x234
VECTCTRL14: 0xFFFFF000 + 0x238
VECTCTRL15: 0xFFFFF000 + 0x23C
Table 18-26. VECTCTRLx Fields
BITS NAME DESCRIPTION
31:6 ///
Reserved Reading returns 0. Write the reset value.
5E
Vectored Interrupt Enable Enables the vector interrupt. This bit is cleared
on System Reset.
4:0 IntSource
Interrupt Source Selection Selects the interrupt source from any of the 32
interrupt sources.