Sharp LH79524 - Table 11-40. MUXCTL14 Register; Table 11-41. MUXCTL14 Fields; Multiplexing Control 14 Register (MUXCTL14)

I/O Configuration LH79524/LH79525 User’s Guide
11-30 Version 1.0
11.2.2.20 Multiplexing Control 14 Register (MUXCTL14)
The MUXCTL14 Register allows software to configure a number of LH79524/LH79525 pins.
Table 11-40. MUXCTL14 Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD nCS3 nCS2 nCS1 nCS0 /// nBLE3 nBLE2 nBLE1
LH79525
RESET
0001000000000000
LH79524
RESET
0000000000000000
RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
ADDR 0xFFFE5000 + 0x68
Table 11-41. MUXCTL14 Fields
BIT NAME DESCRIPTION
31:12 /// Reserved Reading returns 0. Write the reset value.
15:14 nCS3
nCS3/PM3 Assignment
00 =nCS3
01 = PM3
10 = Reserved
11 = Reserved
13:12 nCS2
nCS2/PM2 Assignment
00 =nCS2
01 = PM2
10 = Reserved
11 = Reserved
11:10 nCS1
nCS1/PM1 Assignment
00 =nCS1
01 = PM1
10 = Reserved
11 = Reserved
9:8 nCS0
nCS0/PM0 Assignment
00 =nCS0
01 = PM0
10 = Reserved
11 = Reserved
7:6 /// Reserved Reading returns 0. Write the reset value.
5:4 nBLE3
nBLE3/PM7 Assignment
00 =nBLE3
01 = PM7
10 = Reserved
11 = Reserved