Sharp LH79524 - Figure 4-9. TFT Vertical Timing Diagram

Color Liquid Crystal Display Controller LH79524/LH79525 User’s Guide
4-46 Version 1.0
Figure 4-9. TFT Vertical Timing Diagram
VDD
See
Note 2
DISPLAY-DEPENDENT
TURN-ON DELAY
1 TFT FRAME
PANEL POSITIVE HIGH-VOLTAGE SUPPLY ACTIVE
PANEL NEGATIVE HIGH-VOLTAGE SUPPLY ACTIVE
PANEL LOGIC ACTIVE
PANEL DATA CLOCK ACTIVE
DATA ENABLE
BACK PORCH
ENUMERATED IN
HORIZONTAL 'LINES'
SEE 'TFT HORIZONTAL TIMING DIAGRAM'
ENUMERATED IN
HORIZONTAL 'LINES'
FRONT PORCHALL 'LINES' FOR ONE FRAME
VSS
LCDVDDEN (DIGITAL SUPPLY ENABLE)
LCDDCLK (PANEL CLOCK) TIMING2:PCD TIMING2: BCD TIMING2: IPC
LCDEN (DATA ENABLE) TIMING2:ACB TIMING2: IOE
LCDFP (VERTICAL SYNCHRONIZATION PULSE) TIMING1: IVS
PIXEL DATA AND HORIZONTAL CONTROL SIGNALS FOR ONE FRAME
NOTES: 1. Signal polarties may vary for some displays. 2. The use of LCDDSPLEN for high-voltage power control is optional on some TFT panels.
DISPLAY
DEPENDENT
TURN-OFF DELAY
TIMING1: VBP TIMING1: LPP TIMING1: VFP
TIMING1: VSW
LH79525-40