Sharp LH79524 - Match Register (MR); Table 12-4. MR Register; Table 12-5. MR Fields; Table 12-6. LR Register

Real Time Clock LH79524/LH79525 User’s Guide
12-4 Version 1.0
12.2.2.2 Match Register (MR)
MR is the Match Register. Program the value at which the RTC Interrupt will be generated
into this register. The difference between this value and the value in the Load Register is
the time in seconds, between count initiation and interrupt generation. The current setting
can be read.
12.2.2.3 Load Register (LR)
LR is the Load Register. Program this register with the value from which to initiate the
count sequence. The count begins on the next rising edge of the 1 Hz clock. Note that
counting may not begin for up to one second.
Reading this register returns the last value written.
Table 12-4. MR Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD RTCMR
RESET 0000000000000000
RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD RTCMR
RESET 0000000000000000
RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
ADDR 0xFFFE0000 + 0x04
Table 12-5. MR Fields
BIT NAME DESCRIPTION
31:0 RTCMR RTC Match Register Contains the match value in hexadecimal.
Table 12-6. LR Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD RTCLR
RESET 0000000000000000
RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD RTCLR
RESET 0000000000000000
RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
ADDR 0xFFFE0000 + 0x08
Table 12-7. LR Fields
BIT NAME DESCRIPTION
31:0 RTCLR RTC Load Register Hexadecimal start count value